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DVB-T2 modulator

Product code: CMS0041

 
The Commsonic DVB-T2 Modulator core provides a very efficient FPGA or ASIC implementation of all functions required to modulate the output from a MPEG-2 transport multiplexer according to the DVB-T2 ETSI EN302 755. The DVB-T2 modulator core is compliant with the specification and fully supports 1K, 2K, 4K, 8K, 16K and 32K COFDM modes. The DVB-T2 core features an integrated normal- and short-frame length BCH/LDPC encoder. L1FIELD padding, encoding and puncturing are performed automatically. Support for single or multiple PLP network configurations.
The standard output is a baseband I/Q digital pair for direct connection to a DAC. Alternative output configurations include a low IF, direct connection to standard Analog Devices Direct Digital Synthesizers (e.g. AD9857), or Analog Device RF DACs (e.g. AD9789).
Every effort has been made to keep the size of the DVB-T2 modulator to an absolute minimum in order to target the low-cost FPGA families, however this has not been at the expense of functionality. Synthesis directives are used wherever possible to remove blocks within the design which contain functionality not required for all applications.

Certification

DVB-T2 modulator DVB-T2 Standard

Block diagram

DVB-T2 modulator block diagram (click to enlarge)
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Safari Plug-in

DVB-T2 modulator safari plug-in (click to enlarge)
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Standards compliance

  • ETSI EN302 755

Features

  • 1k, 2k, 4k, 8k, 16k and 32k OFDM.
  • BPSK, QPSK, QAM-16, QAM-64 and QAM-256 support.
  • Variable 1ยท7-10MHz bandwidth interpolation.
  • Automatic L1 field padding and puncturing.
  • Integrated LDPC Channel Coder.
  • Short (16kb) and normal (64kb) frames
  • SISO and/or MISO operation.
  • Single or multiple PLP support.
  • All pilot patterns supported, PP1..PP8
  • FFT guard interval insertion.
  • Optional FFT output windowing.
  • Optional FEF support.
  • Optional CPU-free configuration.
  • Optional L1-ACE processing.
  • Optional P2-bias cell insertion.
  • Optional local ID insertion.
  • Optional PAPR-TR processor.
  • External AD9857/AD9957 DDS interface.
  • Automatic AD9857/AD9957 programming.
  • External AD9789 RF DAC interface.
  • Automatic AD9789 programming.
  • Optional AD9516/ADF4350 PLL programming.
  • Optional internal IF conversion.
  • Optional in-band equalisation.

Implementation

Plug-ins / Extensions