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DVB-Satellite FEC Decoder (CMS0077)
v8.4: September, 2023
- Xilinx ultrascale QOR updates.
v8.2: May, 2023
- Microsemi PolarFire LUT improvements.
8.0: February, 2023
- QOR improvements.
- Added LUT initialisation interface.
7.7: August, 2022
- QPSK low-SNR / low code-rate performance improvements.
7.6: January, 2022
- Xilinx DVB-S2X PAR speed improvements.
7.5: October, 2021
- MicroSemi QOR updates and PAR speed improvements.
7.4: August, 2021
- QOR updates and PAR speed improvements.
7.2: July, 2021
- Xilinx ultrascale BlockRAM speed improvements.
7.1: June,
- Xilinx ultrascale QOR improvements.
6.9: April, 2021
6.8: March, 2021
6.7: December, 2020
- Microsemi PolarFire updates.
6.6: October, 2020
- Fixed 128-APSK interleave issue at higher baud-rates.
- Improved max baud-rate to LDPC core clock ratio.
6.5: October, 2020
- Xilinx ultrascale updates.
6.4: September, 2020
- Updated version register to reflect Megacore build versioning.
v6.3: September, 2020
- Added option to configure TS PRBS PID and seed .
v6.1: August, 2020
- Corrected Intel Platform design multi-clock wiring.
v6.0: July, 2020
- Added frame-padding output indicator.
v5.7: July, 2020
- BBF to UP unpacking options for ACM mode.
v5.6: July, 2020
- DVB-S2 Short-frame optimisations.
v5.5: May, 2020
- BBF to UP unpacking improvements.
v5.3: February, 2020
- Quartus Prime QOR updates.
v5.2: January, 2020
- Added missing Modelsim simulation libraries.
v5.1: January, 2020
- Quartus PAR updates.
- Arria-10 QOR improvements.
v4.7: October, 2018
- Added max-iterations per PlsCode.
v4.3: September, 2018
- Added decoder frame overflow indication.
v4.2: August, 2018
- Added decoded frame logging.
v4.1: July, 2018
- Migrated host interface to use an independent clock source.
v3.9: July, 2018
- Quartus megacore evaluation update.
v3.8: July, 2018
- Quartus multi-clock PAR and host interface updates.
v3.4: April, 2018
- Quartus multi-clock PAR updates.
v3.2: March, 2018
v3.0: February, 2018
- Quartus megacore generation updates.
- Added multi-demod channel support.
v2.8: February, 2018
v2.6: October, 2017
- Multi clock domain support updates.
v2.5: October, 2017
- Further parameterisation options.
v2.0: May, 2017
- FPGA specific PAR frequency improvements.
v1.5: September, 2016
v1.3: July, 2016
- DVB-S2X code-rate performance improvements.
v1.2: June, 2016
- Added options for improved PAR speed.
- DVB-S2 decode performance improvements.
- DVB-S2X 128-APSK decode fixes.
v0.9: April, 2016
- Increased average iteration count filtering.
v0.8: April, 2016
- Short-frame decoding improvements, and Quartus QoR improvements.
- Added Arria-V specific architecture.
v0.7: March, 2016
- Added various software decoding control registers.
v0.4: February, 2016
v0.3: January, 2016
- Higher order APSK Slicer improvements.
- Added FEC statistical analysis.
- Pre-Quartus 15.1 compatibility updates.
- Updated QSYS interconnect to demodulator.
v0.2: January, 2016
- Slicer improvements and DVB-S2X style PLSCODE changes.
- Quartus 15.1 updates.
v0.1: May, 2015
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