Products » Cable Satellite Terrestrial Codecs General » DVB-Satellite demodulator » DVB-Satellite demodulator diagram Block diagram DVB-Satellite demodulator Safari plug-in Safari Plug-in 

DVB-Satellite demodulator

Product code: CMS0059

The CMS0059 has been designed from the ground-up for high-speed and gate-efficient implementation on FPGA and ASIC platforms and offers "near Shannon limit" performance when combined with an advanced FEC decoder solution.
The demodulator provides an adaptable starting point for receiver sub-systems to be used in both the current and next-generation of digital TV set-top-boxes, VSAT terminals and related test and monitoring equipment.
The core may be seamlessly linked to the Commsonic CMS0077 FEC Decoder for a complete satellite receiver solution.


DVB-Satellite demodulator DVB-S2X Standard
DVB-Satellite demodulator DVB-S2 Standard
DVB-Satellite demodulator DVB-S Standard
DVB-Satellite demodulator DVB-DSNG Standard

Block diagram

DVB-Satellite demodulator block diagram (click to enlarge)
Click on diagram to enlarge

Safari Plug-in

DVB-Satellite demodulator safari plug-in (click to enlarge)
Click on image for further information

Standards compliance

  • ETSI EN 302 307-1
  • ETSI EN 302 307-2
  • ETSI EN 301 210
  • ETSI EN 300 421
  • ARIB STD B44


  • Optional integrated DVB-S / DSNG decodings.
  • Automatic DVB-S / DSNG / S2 / S2X / ISDB acquisition.
  • Support for CCM, VCM and ACM modes.
  • Support for DVB-S2X Annex-M acquisition.
  • Sync acquisition at -2dB C/N.
  • Wide carrier acquisition range.
  • Programmable symbol rate recovery
    few kSymb/s to >45 MSymb/s.
  • Real IF, zero-IF or near-zero-IF.
  • Variable ADC sampling frequency.
  • Frame-by-frame (A)PSK selection.
  • QPSK, 8PSK, 16APSK, 32APSK.
  • 64-APSK, 128-APSK and 256-APSK.
  • Short (16kb) and normal (64kb) frames
  • Frames with/without intra-frame Pilots.


  • ASICs for digital satellite TV reception.
  • High-end interactive satellite terminals.
  • Test, measurement and broadcast monitoring equipment.
  • Multi-standard, adaptable (software defined) receivers.


  • Single external clock source.
  • Single external analogue AGC loop.
  • All-digital timing and carrier recovery.
  • Digital channel filtering.
  • Optimised for ASIC, Xilinx and Altera.
  • Evaluation boards available.

Plug-ins / Extensions

  • Group-delay equalisation.