Products » Cable Satellite Terrestrial Codecs General » Multi-channel DVB-C / J83 FEC encoder » Multi-channel J.83abc/DVB-C cable FEC encoder diagram Block diagram 
 
Cable
 
 

Multi-channel DVB-C / J83 FEC encoder

Product code: CMS0044

 
The Commsonic CMS0044 J.83abc/DVB-C Cable FEC Encoder combines all of the channel coding and Forward Error Correction functions specified by DVB-C and by J83 Annexes A B and C. It is designed to interface to external modulators or advanced upconverting DACs such as the Analog Devices AD9789.
The CMS0044 includes functions for framing, scrambling, interleaving, Reed-Solomon coding, trellis coding, and QAM mapping.
The multi-channel encoder uses a common transmission mode, so symbol timing is common for all channels. The encoder may be built with individual interleave modes, as this does not impact data symbol timing. However, this requires more memory bandwidth.
Also see:

Block diagram

Multi-channel DVB-C / J83 FEC encoder block diagram (click to enlarge)
Click on diagram to enlarge

Downloads

Multi-channel DVB-C / J83 FEC encoder Release noteRelease note
Multi-channel DVB-C / J83 FEC encoder Technical data brief, 19th October 2011 (364 kB)Technical data brief, 19th October 2011 (364 kB)
Multi-channel DVB-C / J83 FEC encoder IP Guide, 26th September 2011 (956 kB)IP Guide, 26th September 2011 (956 kB)
Multi-channel DVB-C / J83 FEC encoder Altera Megacore, v1.2 (23.25 MB)Altera Megacore, v1.2 (23.25 MB)
E-mail me when these downloads are updated
Follow updates on twitter ...

Standards compliance

  • DVB-C EN 300 429
  • ITU J83 Annexes A/B/C
  • DOCSIS 1.x/2.0/3.0

Features

  • On/off -chip interleaver memory.
  • Mapped/unmapped symbol data outputs.
  • Single or multiple channels per core.
  • Single or multiple standards per core.

Inputs

  • Standard MPEG Transport Streams.
  • NULL packet insertion and PCR correction.
  • Optional PRBS TS packet insertion.
  • On-air TS rate reference clock.
  • TS input and output rate estimation.
  • NULL TS packet removal/filtering.
  • Automatic TS re-synchronisation.
  • Cypress/Gennum ASI interface.
  • Seamless integration with Altera ASI Megacore.

Outputs

Implementation

  • Single external clock source.
  • Optimised for Xilinx and Altera.

Plug-ins / Extensions